1. Field of the Disclosure
The disclosure relates generally to data communications, and in particular, to achieving universal cross connect between Time Domain Multiplexed (TDM) data over digital data networks.
2. The Prior Art
A T1 circuit is a long-distance, point-to-point circuit, providing 24 channels of 64 Kbps, giving a total bandwidth of 1.544 Mbps. The standard T1 frame is 193 bits long, made up of twenty-four 8-bit voice samples and one synchronization bit, and is transmitted at a rate of 8000 frames per second. When a T1 service is made available in single 64 Kbps increments, it is known as fractional T1. In Europe, the comparable circuit is known as E-1, and it has a speed of 2.054 Mbps. T1 has been superseded by the CCITT DS-1 designation.
However, many customers do not need the bandwidth provided by a full T1 circuit, and instead lease a fractional T1, or a one or more portions of a T1 circuit. A T1 circuit has a capacity of 1.544 Mbps, the equivalent of twenty-four 64 Kbps channels. Customers can lease as many of these 64 Kbps channels as they need; they are not required to lease the entire 1.544 Mbps circuit.
FIG. 1 is a prior art diagram of an enterprise system 100 coupling a first user 110 to a second user 150 through an enterprise network 130, such as a LAN or WAN as is known in the art. In the example of FIG. 1, the users 110 and 150 are coupled to the enterprise network 130 through distinct T1 circuits T1A (120) and T1B (140), respectively.
FIG. 1 illustrates one application providing voice applications over distinct T1 lines, which are data only.
For example, in the system of FIG. 1, an external phone call placed by user 110 may come in over T1 circuit 120 destined for user 150 over T1 circuit 140.
To interface time-division multiplexed data between distinct T1 circuits, the enterprise network must perform time slot assignment. When a customer leases a partial T1 circuit, partial circuits of separate or distinct time slots must also be properly interfaced. This is typically accomplished using a time-slot assigner (TSA), which implements both internal route selection and time-division multiplexing (TDM) for multiplexed serial channels. A TSA typically supports the serial bus rate and format for most standard TDM buses, including the T1 and CEPT highways, pulse code modulation (PCM) highway, and ISDN buses.
However, partial T1 customers are typically assigned a portion of the time slots available, and their data must be assigned to their particular time slots. Thus, when interfacing multiple T1 circuits, care must be taken to insure that data received from a first T1 data stream in corresponding time slots is properly placed onto a second T1 data stream in the proper time slots appropriate for the second data stream. Such a process is typically referred to as drop and insert, or herein as cross connect, where distinct T1 circuits and their respective time slot assignments are cross connected.